Overview
The 8080 is an 8 bit processor released by Intel in 1974. It has an 8-bit data bus and a 16-bit address bus allowing it to access 64 KiB of memory. Originally designed for use in calculators and other electronic devices it found widespread use in early microcomputers including the Altair 8080 and other systems using the S-100 bus.
CPU Registers
The 8080 has 6 general purpose 8-bit registers that can be referenced as three 16-bit register pairs. The Accumulator (A) is an additional 8-bit register with some special capabilities. For example condition flags are typically set based on the value in A. A and the condition flags can be treated as the Program Status Word (PSW) register pair;
| Register Pair | Upper Register | Lower Register |
| PSW | A | Flags |
| B | B | C |
| D | D | E |
| H | H | L |
There are also two special 16-bit registers. The Program Counter (PC) register holds the address of the next instruction to be executed. The Stack Pointer (SP) holds the address of the last value added to the stack.
Condition Flags
The 8080 has 5 flags that are set by various instructions.
Carry/Borrow
Set if a carry out occurs from an addition instruction or a borrow occurs from a subtraction.
Sign
Set based on the most-significant bit of the value in the accumulator to indicate the sign of the result.
0 - Positive
1 - Negative.
Zero
Set if the value in the accumulator is zero.
Parity
Set based on the parity of the value in the accumulator.
0 - Odd Parity
1 - Event Parity
Auxiliary Carry
Set if a carry out occurs from bit 3 of the accumulator. Used for Binary Coded Decimal instructions which treat the accumulator as two 4 bit values.
Stack Operations
The stack location is set by loading a value into SP and it expands downwards in memory. Items are added to and removed from the stack in 16-bit chunks.
Addressing Modes
The 8080 has 5 addressing modes which determine how operands are provided to the instruction.
Implied Addressing
One or more of the operands is implied by the instruction.
Register Addressing
Operand is a specified register.
Immediate Addressing
Operand is a value encoded as part of the instruction.
Direct Addressing
Address to load the operand from is encoded as part of the instruction
Register Indirect Addressing
Address to load the operand from is specified in a register pair.
Note that the M operand indicates the value at the address specified by the H/L register pair.
Instruction Set
SSS/DDD
Indicates the source register or destination register respectively
000 – Register B
001 – Register C
010 – Register D
011 – Register E
100 – Register H
101 – Register L
110 – M
111 – Accumulator
RR
Indicates a register pair
00 – B/C Register Pair
01 – D/E Register Pair
10 – H/L Register Pair
11 – Stack Pointer or Program Status Word
P
Indicates a register pair
0 – B/C Register Pair
1 – D/E Register Pair
Data
<int8> indicates a signed 8-bit value
<uint8> indicates an unsigned 8-bit value
<int16> indicates a signed 16-bit value in little endian form
<addr6> indicates a 16-bit address in little endian form
Data Transfer Instructions
| Instruction | Description | Binary Format | Octal | Hex |
MVI Reg, <Data>
MVI M, <Data> | Moves the immediate value to the location specified | 00DDD110 <int8> | 0D6 | XX |
| STAX RegPair | Stores the value in the accumulator at the address specified by register pair B/C or D/E | 000P0010 | 0X2 | X2 |
| LDAX RegPair | Loads the accumulator with the value at the address specified by register pair B/C or D/E | 000P1010 | 0X2 | XA |
| STA <address> | Stores the value of the accumulator at the specified address | 00110010 <addr16> | 062 | 32 |
| LDA <address> | Loads the accumulator with the value at the specified address | 00111010 <addr16> | 072 | 3A |
MOV Reg1, Reg2
MOV M, Reg
MOV Reg, M | Moves the value specified by the second operand to the location specified by the first operand | 01DDDSSS | 1DS | XX |
Register Pair Data Transfer Instructions
| Instruction | Description | Binary Format | Octal | Hex |
LXI RegPair <data>
LXI SP <Data> | Loads the specified register pair with the immediate value | 00RR0001 <int16> | 0X1 | X1 |
| SHLD <Address> | Stores the value of L at the specified address. Stores the value of H at the specified address plus one | 00100010 <addr16> | 042 | 22 |
| LHLD <Address> | Loads L with the value at the specified address. Loads H with the value at the specified address plus one | 00101010 <addr16> | 052 | 2A |
| XCHG | Exchanges the value in H/L register pair with the value in D/E register pair | 11101011 | 353 | EB |
| SPHL | Loads the contents of the H/L register pair into the SP register | 11111001 | 371 | F9 |
Addition Instructions
Addition instructions add values to the accumulator. The carry flag is set based on the result of the operation so it can be used for chained multi-byte addition.
| Instruction | Description | Binary Format | Octal | Hex |
ADD Reg
ADD M | Adds the specified value to the accumulator | 10000SSS | 20S | 8X |
ADC Reg
ADC M | Adds the specified value and the carry flag to the accumulator | 10001SSS | 21S | 8X |
| ADI <data> | Adds the immediate value to the accumulator | 11000110 <int8> | 306 | C6 |
| ACI <data> | Adds the immediate value and the carry flag to the accumulator | 11001110 <int8> | 316 | CE |
Subtraction Instructions
Subtraction is performed using 2’s Complement addition. The value to be subtracted is converted to it’s opposite sign value and then added to the accumulator. For example 5 (00000101) would be converted to (11111011) –5 and then added to the accumulator. The carry flag is complemented to generate a borrow flag that can be used for chained multi-byte subtraction.
| Instruction | Description | Binary Format | Octal | Hex |
SUB Reg
SUB M | Subtracts the specified value from the accumulator | 10010SSS | 22S | 9X |
SBB Reg
SBB M | Subtracts the specified value and the carry (borrow) flag from the accumulator | 10011SSS | 23S | 9X |
| SUI <data> | Subtracts the immediate value from the accumulator | 11010110 <int8> | 326 | D6 |
| SBI <data> | Subtracts the immediate value and the carry (borrow) flag from the accumulator | 11011110 <int8> | 336 | DE |
Increment/Decrement Instructions
| Instruction | Description | Binary Format | Octal | Hex |
INR Reg
INR M | Adds 1 to the specified value | 00DDD100 | 0D4 | XX |
DCR Reg
DCR M | Subtracts 1 from the specified value | 00DDD101 | 0D5 | XX |
Register Pair Arithmetic Instructions
| Instruction | Description | Binary Format | Octal | Hex |
INX RegPair
INX SP | Adds 1 to the specified register pair | 00RR0011 | 0X3 | X3 |
DAD RegPair
DAD SP | Adds the value in the specified register pair to H/L | 00RR1001 | 0X1 | X9 |
DCX RegPair
DCX SP | Subtracts 1 from the specified register pair | 00RR1011 | 0X3 | XB |
BCD Instructions
Binary Coded Decimal values use 4 bits to encode the decimal values 0 to 9.
| Instruction | Description | Binary Format | Octal | Hex |
| DAA | Adjusts the value in the accumulator to ensure it contains two 4-bit BCD values | 00100111 | 047 | 27 |
Rotate Instructions
| Instruction | Description | Binary Format | Octal | Hex |
| RLC | Sets the carry flag to the most significant bit of the accumulator. Rotates the bits of the accumulator to the left by one bit with the most significant bit becoming the least significant bit. | 00000111 | 007 | 07 |
| RRC | Sets the carry flag to the least significant bit of the accumulator. Rotates the bits of the accumulator to the right by one bit with the least significant bit becoming the most significant bit. | 00001111 | 017 | 0F |
| RAL | Rotates the bits of the accumulator to the left by one bit. The most significant bit of the accumulator is moved to the carry flag and the previous value of the carry flag is moved to the least significant bit of the accumulator. | 00010111 | 027 | 17 |
| RAR | Rotates the bits of the accumulator to the right by one bit. The least significant bit of the accumulator is moved to the carry flag and the previous value of the carry flag is moved to the most significant bit of the accumulator. | 00011111 | 037 | 1F |
Logical Instructions
| Instruction | Description | Binary Format | Octal | Hex |
| CMA | Complements (Flips all bits) the accumulator | 00101111 | 057 | 2F |
ANA Reg
ANA M | ANDs the specified value with the accumulator | 10100SSS | 24S | AX |
XRA Reg
XRA M | Exclusive ORs the specified value with the accumulator | 10101SSS | 25S | AX |
ORA Reg
ORA M | ORs the specified value with the accumulator | 10110SSS | 26S | BX |
| ANI <Data> | ANDs the immediate value with the accumulator | 11100110 <int8> | 346 | E6 |
| XRI <Data> | Exclusive ORs the immediate value with the accumulator | 11101110 <int8> | 356 | EE |
| ORI <Data> | ORs the immediate value with the accumulator | 11110110 <int8> | 366 | F6 |
Carry Instructions
| Instruction | Description | Binary Format | Octal | Hex |
| STC | Sets the carry flag | 00110111 | 067 | 37 |
| CMC | Complements the carry flag | 00111111 | 077 | 3F |
Compare Instructions
Compare instructions subtract the specified value from the accumulator and use the result to set the condition flags. Neither the source or the accumulator is modified.
If the zero flag is set then the values are equal.
If the two values have the same sign then the carry flag being set indicates that the value being compared is greater than the value in the accumulator otherwise the value in the accumulator is greater.
If the two values have different signs then the carry flag being indicates that the value in the accumulator is greater otherwise the value being compared is greater.
| Instruction | Description | Binary Format | Octal | Hex |
CMP Reg
CMP M | Compares the specified value against the accumulator | 10111SSS | 27S | BX |
| CPI <Data> | Compares the immediate value
against the accumulator | 11111110 | 376 | FE |
Jump Instructions
Jump instructions set the PC to the address specified. Conditional jump instructions only jump if the specified condition is met.
| Instruction | Description | Binary Format | Octal | Hex |
| JNZ <address> | Jump if zero flag is clear | 11000010 <addr16> | 302 | C2 |
| JMP <address> | Unconditional Jump | 11000011 <addr16> | 303 | C3 |
| JZ <address> | Jump if zero flag is set | 11001010 <addr16> | 312 | CA |
| JNC <address> | Jump if carry flag is clear | 11010010 <addr16> | 322 | D2 |
| JC <address> | Jump if carry flag is set | 11011010 <addr16> | 332 | DA |
| JPO <address> | Jump if parity flag is clear (Odd) | 11100010 <addr16> | 342 | E2 |
| JPE <address> | Jump if parity flag is set (Even) | 11101010 <addr16> | 352 | EA |
| JP <address> | Jump if sign flag is clear (Positive) | 11110010 <addr16> | 362 | F2 |
| JM <address> | Jump if sign flag is set (Minus) | 11111010 <addr16> | 372 | FA |
Call Instructions
Call instructions push the PC onto the stack and then set the PC to the address specified. Conditional Call instructions only Call if the specified condition is met.
| Instruction | Description | Binary Format | Octal | Hex |
| CNZ <address> | Call if zero flag is clear | 11000100 <addr16> | 304 | C4 |
| CZ <address> | Call if zero flag is set | 11001100 <addr16> | 314 | CC |
| CALL <address> | Unconditional Call | 11001101 <addr16> | 315 | CD |
| CNC <address> | Call if carry flag is clear | 11010100 <addr16> | 324 | D4 |
| CC <address> | Call if carry flag is set | 11011100 <addr16> | 334 | DC |
| CPO <address> | Call if parity flag is clear (Odd) | 11100100 <addr16> | 344 | E4 |
| CPE <address> | Call if parity flag is set (Even) | 11101100 <addr16> | 354 | EC |
| CP <address> | Call if sign flag is clear (Positive) | 11110100 <addr16> | 364 | F4 |
| CM <address> | Call if sign flag is set (Minus) | 11111100 <addr16> | 376 | FC |
Return Instructions
Return instructions pop the PC off of the stack and start executing at that address. Conditional return instructions only Return if the specified condition is met.
| Instruction | Description | Binary Format | Octal | Hex |
| RNZ | Return if zero flag is clear | 11000000 | 300 | C0 |
| RZ | Return if zero flag is set | 11001000 | 310 | C8 |
| RET | Unconditional Return | 11001001 | 311 | C9 |
| RNC | Return if carry flag is clear | 11010000 | 320 | D0 |
| RC | Return if carry flag is set | 11011000 | 330 | D8 |
| RPO | Return if parity flag is clear (Odd) | 11100000 | 340 | E0 |
| PRE | Return if parity flag is set (Even) | 11101000 | 350 | E8 |
| RP | Return if sign flag is clear (Positive) | 11110000 | 360 | F0 |
| RM | Return if sign flag is set (Minus) | 11111000 | 370 | F8 |
Program Counter Instructions
Setting the program counter to a specific value effectively results in a jump to that address
| Instruction | Description | Binary Format | Octal | Hex |
| PCHL | Sets the PC to the value in the H/L Register Pair | 11101001 | 351 | E9 |
| RST Code | Executes a Call to the address specified by the provided code multiplied by 8. | 11CCC111 | 3C7 | XX |
Stack Instructions
| Instruction | Description | Binary Format | Octal | Hex |
POP RegPair
POP PSW | Reads the value at the address specified by SP and stores it in the low register of the register pair then increments SP and reads the next value into the high register of the register pair and then Increments SP again so it points to the next value. | 11RR0001 | 3X1 | X1 |
PUSH RegPair
PUSH PSW | Decrements SP and writes the value in the high register of the register pair to the address specified by SP then Decrements SP again and writes the value in the low register to the next address. | 11RR0101 | 3X5 | X5 |
| XTHL | Reads the value at the address specified by SP and exchanges it with the value in L and then reads the value at the address specified by SP plus one and exchanges it with the value in H. The value in SP is unchanged | 11100011 | 343 | E3 |
I/O Instructions
I/O instructions are used to communicate with other devices. The processor puts a copy of the I/O port number on the high and low parts of the address bus which is used to signal to the device that it should read or write data.
| Instruction | Description | Binary Format | Octal | Hex |
| OUT <Port> | Writes the value in the accumulator out to the specified I/O port | 11010011 <uint8> | 323 | D3 |
| IN <Port> | Reads a value from the specified I/O port in to the accumulator | 11011011 <uint8> | 333 | DB |
Interrupt Instructions
Interrupts allow the processor to pause execution to handle a single byte instruction that is put on the bus by other devices. Typically this is a RST instruction which results in the CPU calling to a specific instruction specified by the code in the RST instruction. These can be used when a device wants to signal to the CPU that something happened.
| Instruction | Description | Binary Format | Octal | Hex |
| DI | Disables interrupts | 11110011 | 363 | F3 |
| EI | Enables Interrupts | 11111011 | 373 | FB |
Machine Control Instructions
| Instruction | Description | Binary Format | Octal | Hex |
| NOP | No operation | 00000000 | 000 | 00 |
| HLT | Halts the processor | 01110110 | 166 | 76 |